FPGA Based System Design
Final EXam Content
-----------------------------

ALL Lectures


Material covered from Advanced Digital Design with Verilog HDL

Chapter 5
5.0 - 5.11 (both inclusive)
5.14 - 5.16 (both inclusive)

Chapter 6
6.0 - 6.9 (both inclusive)

Chapter 7
7.0 - 7.3 (both inclusive)